1. Field of the Invention
The present invention generally relates to an address recognition apparatus in optical packet communications.
Priority is claimed on Japanese Patent Application No. 2005-345230, filed Nov. 30, 2005, the content of which is incorporated herein by reference.
2. Description of the Related Art
All patents, patent applications, patent publications, scientific articles, and the like, which will hereinafter be cited or identified in the present application, will hereby be incorporated by reference in their entirety in order to describe more fully the state of the art to which the present invention pertains.
As in the recent years the Internet has been widely and rapidly spread, the requirement for realizing a high speed and large capacity network has been on the increase. In order to realize the network, an optical fiber communication has been developed and practiced. The optical fiber provides a transmission path that is adapted to transmit information as optical signal, instead of electrical signal. In the optical fiber communication, an optical packet communication has been established, wherein a set of information is divided into a plurality of optical packets that are to be transmitted on the optical fiber.
For preventing any substantive reduction of the transmission rate, it is desired to avoid that a set of optical signals being transmitted on the optical fiber is converted into a set of electrical signals so that the set of electrical signals are then processed. In this viewpoint, the optical packet communication can use an address recognition apparatus that is configured to recognize a destination address, to which one or more optical packets are intended to be transmitted. FIG. 5 is a diagram illustrating a configuration of a conventional address recognition apparatus to be used in the optical packet communication.
An address recognition apparatus 10 includes a first optical path 1, a second optical path 2, a first light receiving device 3, a second light receiving device 4, a DC power supply 5, a resistive element 6, an amplifier 7, and an address determining unit 8. Each of the first and second optical paths 1 and 2 is optically coupled to an optical fiber 20 that is adapted to transmit optical packet signals. The optical fiber 20 is also optically coupled to a delay optical fiber 20a. An optical packet signal processor 30 is optically coupled through the delay optical fiber 20a to the optical fiber 20.
A set of optical packet signals is transmitted on the optical fiber 20, and then divided into a first divided set of optical packet signal s1, a second divided-set of optical packet signal s2, and a third divided-set of optical packet signal.
The first optical path 1 is formed by an optical fiber that has a predetermined optical path length. The first optical path 1 has a first emitting edge 1a. The first optical path 1 is adapted to transmit the first divided-set of optical packet signals s1 to the first emitting edge 1a so that a first divided beam of light representing the first divided-set of optical packet signals s1 is emitted from the first emitting edge 1a toward the first light receiving device 3.
The second optical path 2 has a second emitting edge 2a. The second optical path 2 is formed by an optical fiber that has a predetermined optical path length that is longer by a difference ΔL1 than that of the first optical path 1. The second optical path 2 has a second emitting edge 2a. The second optical path 2 is adapted to transmit the second divided-set of optical packet signals s2 to the second emitting edge 2a so that a second divided beam of light representing the second divided-set of optical packet signals s2 is emitted from the second emitting edge 2a toward the second light receiving device 4.
The first light receiving device 3 is realized by a first photodiode that is adapted to receive the first divided beam of light representing the first divided-set of optical packet signals s1 and generate a first photocurrent I1 representing a first intensity of the first divided beam of light. The first light receiving device 3 has a cathode electrode that is electrically coupled to the DC power supply 5. The first light receiving device 3 has an anode electrode that is electrically coupled to an anode electrode of the second light receiving device 4. The anode electrode of the first light receiving device 3 is also electrically coupled to a first side of the resistive element 6. The anode electrode of the first light receiving device 3 is also electrically coupled to an input of the amplifier 7.
The second light receiving device 4 is realized by a second photodiode that is adapted to receive the second divided beam of light representing the second divided-set of optical packet signals s2 and generate a second photocurrent I2 representing a second intensity of the second divided beam of light. The second light receiving device 4 has a cathode electrode that is electrically coupled to the DC power supply 5. The second light receiving device 4 has an anode electrode that is electrically coupled to the anode electrode of the first light receiving device 3. The anode electrode of the second light receiving device 4 is also electrically coupled to the first side of the resistive element 6. The anode electrode of the second light receiving device 4 is also electrically coupled to the input of the amplifier 7.
The DC power supply 5 supplies a DC voltage Vcc to the cathode electrodes of the first and second light receiving devices 3 and 4. The resistive element 6 can be realized by a circuitry having a resistive impedance. The resistive element 6 has the first side that is electrically coupled to the anode electrodes of the first and second light receiving devices 3 and 4 and also coupled to the input of the amplifier 7. The resistive element 6 also has a second side that is electrically grounded.
The amplifier 7 is adapted to receive a voltage signal V0 that appears across the resistive element 6 and generate an amplified voltage signal V1.
The address determining unit 8 is functionally coupled to the amplifier 7 to receive the amplified voltage signal V1 from the amplifier 7. The address determining unit 8 is configured to perform a predetermined set of signal processing, based on the amplified voltage signal V1, so as to determine whether or not the received set of optical packet signals that has been transmitted on the optical fiber 20 has a destination address to the self station associated with the address recognition apparatus 10. The address determining unit 8 is configured to generate an address determination signal that represents the result of determination on the address. The address determining unit 8 is configured to supply the address determination signal to the optical packet signal processor 30 that is placed on the follower stage to the address recognition apparatus 10.
The delay optical fiber 20a can be realized by an optical fiber that has a delay optical path length difference ΔL2 from the first optical path length of the first optical path 1. The delay optical fiber 20a can be adapted to transmit the third divided-set of optical packet signal from the optical fiber 20 to the optical packet signal processor 30.
The optical packet signal processor 30 is optically coupled to the delay optical fiber 20a to receive the third divided-set of optical packet signal that has been transmitted on the delay optical fiber 20a. The optical packet signal processor 30 is functionally coupled to the address determining unit 8 to receive the address determination signal from the address determining unit 8. The optical packet signal processor 30 is configured to perform a predetermined set of signal processing of the third divided-set of optical packet signal, based on the address determination signal, thereby generating a set of processed optical packet signals. In a case, the optical packet signal processor 30 can be configured to transmit the set of processed optical packet signals to the optical communication network. In another case, the optical packet signal processor 30 can be configured to transmit, without performing any processing, the third divided-set of optical packet signal to the optical communication network.
Operations of the address recognition apparatus 10 will be described. The set of optical packet signals is transmitted on the optical fiber 20, and then divided into the first divided set of optical packet signal s1 to be transmitted on the first optical path 1, a second divided-set of optical packet signal s2 to be transmitted on the second optical path 2, and a third divided-set of optical packet signal to be transmitted on the delayed optical fiber 20a. 
FIG. 6A is a timing chart illustrating a waveform of a first example of the optical packet signal that is input into the address recognition apparatus 10 shown in FIG. 5. FIG. 6B is a timing chart illustrating a waveform of a second example of the optical packet signal that is input into the address recognition apparatus 10 shown in FIG. 5. As shown in FIGS. 6A and 6B, the optical packet signal includes a header bit d1 so called to as a frame delimiter, an address bit d2 defining a destination address, and a payload d3 including various types of data. In the case of optical packet communication, the timing of appearing the address bit d2 represents the address. Namely, the coordinate on the time-axis of the address bit d2 defines the address. The address bit d2 shown in FIG. 6A is different in the position on the time axis from the address bit d2 shown in FIG. 6B. This means that the optical packet signals shown in FIGS. 6A and 6B have different destination addresses.
As described above, the first divided set of optical packet signal s1 is transmitted on the first optical path 1 and then emits from the first emitting edge 1a toward the first light receiving device 3. The second divided set of optical packet signal s2 is transmitted on the second optical path 2 and then emits from the second emitting edge 2a toward the second light receiving device 4. The second optical path 2 is longer by the optical path length difference ΔL1 than the first optical path 1. The optical path length difference ΔL1 causes a difference in time between when the first light receiving device 3 receives the first divided set of optical packet signal s1 and when the second light receiving device 4 receives the second divided set of optical packet signal s2.
FIG. 7 is a timing chart illustrating a time difference between when the first light receiving device 3 receives the first divided set of optical packet signal s1 and when the second light receiving device 4 receives the second divided set of optical packet signal s2. The optical path length difference ΔL1 is previously adjusted so that the address bit d2 of the first divided set of optical packet signal received by the first light receiving device 3 is phase-matched to the header bit d2 of the second divided set of optical packet signal received by the second light receiving device 4. In other words, only when the set of optical packet signal transmitted on the optical fiber 20 has a specific or predetermined destination address, then the first and second light receiving devices 3 and 4 receive concurrently the address bit d2 of the first divided set of optical packet signal s1 and the header bit d1 of the second divided set of optical packet signal, respectively.
If the first and second light receiving devices 3 and 4 receive concurrently the address bit d2 of the first divided set of optical packet signal s1 and the header bit d1 of the second divided set of optical packet signal, respectively, then this means that the set of optical packet signal transmitted on the optical fiber 20 has the destination address that is identical to the address of the self station associated with the address recognition apparatus 10. In this case, almost the same photocurrents flow through the first and second light receiving devices 3 and 4, and the voltage signal V0 across the resistive element 6 is caused, which has a first voltage level.
If the first and second light receiving devices 3 and 4 receive, at different timings, the address bit d2 of the first divided set of optical packet signal s1 and the header bit d1 of the second divided set of optical packet signal, respectively, then this means that the set of optical packet signal transmitted on the optical fiber 20 has a different destination address from the address of the self station associated with the address recognition apparatus 10. In this case, a photocurrent flows either one of the first and second light receiving devices 3 and 4, and the voltage signal V0 across the resistive element 6 is caused, which has a second voltage level that is equal to a half of the first voltage level.
The voltage signal V0 is input into the amplifier 7 and amplified into an amplified voltage signal V1 by the amplifier 7. The amplified voltage signal V1 is input into the address determining unit 8.
FIG. 8 is a diagram illustrating a relationship of an amplified voltage signal V1 to a given threshold. The address determining unit 8 is configured to compare the maximum value of the amplified signal V1 with the threshold. If the address determining unit 8 verifies that the maximum value is equal to or higher than the threshold, then the address determining unit 8 determines that the set of optical packet signals transmitted on the optical fiber 20 has the same destination address as the address to the self station associated with the address recognition apparatus 10, thereby generating a first state of address determination signal. The first state of address determination signal can be high. The first state of address determination signal is input into the optical packet signal processor 30.
If the address determining unit 8 verifies that the maximum value is lower than the threshold, then the address determining unit 8 determines that the set of optical packet signals transmitted on the optical fiber 20 has a different destination address from the address to the self station associated with the address recognition apparatus 10, thereby generating a second state of address determination signal. The second state of address determination signal can be low. The second state of address determination signal is input into the optical packet signal processor 30.
The third divided set of optical packet signal is transmitted on the delay optical fiber 20a. The delay optical path length difference ΔL2 of the delay optical fiber 20a causes a time delay in allowing the optical packet signal processor 30 to receive the third divided set of optical packet signal. The delay optical path length difference ΔL2 is set taking into account a time until the address determination process is completed by the address determining unit 8.
Upon receipt of the input of the first state of state of address determination signal, the optical packet signal processor 30 determines that the address of the set of optical packet signals transmitted on the optical fiber 20 has the same destination address as the address of the self station associated with the address recognition apparatus 10. In this case, the optical packet signal processor 30 applies the predetermined set of signal processing to the third divided set of optical packet signal that has been transmitted on the delay optical fiber 20a, and the optical packet signal processor 30 transmits a set of processed optical packet signal to the optical communication network.
Upon receipt of the input of the second state of state of address determination signal, the optical packet signal processor 30 determines that the address of the set of optical packet signals transmitted on the optical fiber 20 has a different destination address from the address of the self station associated with the address recognition apparatus 10. In this case, the optical packet signal processor 30 transmits the third divided set of optical packet signal to the optical communication network without performing any processing.
The address recognition apparatus 10 to be used in the optical packet communication is configured to determine whether or not the set of input optical packet signals transmitted on the optical fiber 20 has an address that is defined by an optical path length difference between the first and second optical paths 1 and 2. If the address recognition apparatus 10 verifies that the set of input optical packet signals has the address that is defined by the optical path length difference, then the address recognition apparatus 10 recognizes that the set of input optical packet signals has the same address as the address of the self station associated with the address recognition apparatus 10.
In other words, the address recognition apparatus 10 is configured to determine whether or not the set of input optical packet signals transmitted on the optical fiber 20 has an address that allows the first and second light receiving devices 3 and 4 to receive concurrently the address bit d2 of the first divided set of optical packet signal s1 and the header bit d1 of the second divided set of optical packet signal, respectively. If the address recognition apparatus 10 verifies that the set of input optical packet signals has the address that allows the first and second light receiving devices 3 and 4 to receive concurrently the address bit d2 and the header bit d1 respectively, then the address recognition apparatus 10 recognizes that the set of input optical packet signals has the same address as the address of the self station associated with the address recognition apparatus 10.
Japanese Unexamined Patent Application, First Publication, No. 2002-305478 discloses a conventional technique for an address processor to be used in the optical packet communication. The conventional address processor has a reduced number of parts or elements that need to perform address processing operations. The conventional technique is related to scale down the processor and to improve high speed performance.
In the address recognition apparatus 10 shown in FIG. 5, the intensity of the set of optical packet signals transmitted on the optical fiber 20 is not always constant but may vary largely. For example, if the first and second light receiving devices 3 and 4 receive concurrently the address bit d2 of the first divided set of optical packet signal s1 and the header bit d1 of the second divided set of optical packet signal, respectively, then this means that the set of optical packet signal transmitted on the optical fiber 20 has the destination address that is identical to the address of the self station associated with the address recognition apparatus 10. In this case, however, it is possible that the intensity of the set of input optical packet signals having been transmitted on the optical fiber 20 is so weak that the amplified voltage signal V1 is lower than the threshold, whereby the address recognition apparatus 10 determines incorrectly that the set of optical packet signal transmitted on the optical fiber 20 has a different destination address from the address of the self station associated with the address recognition apparatus 10.
If the first and second light receiving devices 3 and 4 receive, at different timings, the address bit d2 of the first divided set of optical packet signal s1 and the header bit d1 of the second divided set of optical packet signal, respectively, then this means that the set of optical packet signal transmitted on the optical fiber 20 has a different destination address from the address of the self station associated with the address recognition apparatus 10. In this case, however, it is possible that the intensity of the set of input optical packet signals having been transmitted on the optical fiber 20 is so strong that the amplified voltage signal V1 is higher than the threshold, whereby the address recognition apparatus 10 determines incorrectly that the set of optical packet signal transmitted on the optical fiber 20 has the same destination address as the address of the self station associated with the address recognition apparatus 10.
The large variation in the intensity of the set of optical packet signals transmitted on the optical fiber 20 may, in case, cause the address recognition apparatus 10 to recognize incorrectly the destination address of the set of input optical packet signals.
In view of the above, it will be apparent to those skilled in the art from this disclosure that there exists a need for an improved address recognition apparatus and/or an improved address recognition method. This invention addresses this need in the art as well as other needs, which will become apparent to those skilled in the art from this disclosure.